ENIAC                             U. S. Army

A REPORT ON THE ENIAC -- Part I, Chapter 3


The cycling unit of the ENIAC is the device which provides pulses and a gate for the other units to operate on and which, thus, keeps the units operating in synchronism with one another.

Normally a quartz crystal oscillator emits 100 kc sine waves which are converted into pulses spaced at a 10 microseconds interval by a pulse standardizer. The fundamental time unit for the ENIAC, a pulse time, is thus 10 microseconds. The output of the pulse standardizer goes to the so called on beat circuit which contains another pulse standardizer and tubes for power amplification. The on beat circuit emits pulses (through one of its 3 outputs) to the off beat circuit. The off beat circuit shapes, amplifies and delays the pulses which it receives. One output of the off beat circuit, delayed 1.25 microseconds after the on beat pulses is taken to a 20 stage ring counter (neons correlated with the stages of the ring are shown on PX-9-304) which controls certain gates and flip-flops. The off beat pulses, delayed 2.5 microseconds after the on beat pulses, are taken to a gate which is controlled by a flip-flop, in turn, controlled by the ring. Other gates associated with the ring pass on beat pulses. The ring with its associated flip-flops and gates is responsible for producing a pattern of pulses repeated every 20 pulse times (or every addition time). The gate and each of the 9 different kinds of pulses (see PX-9-306) emitted every addition time are carried on one of the 11 leads of the synchronizing trunk (see Chapter II for the use of the 11th lead). The various units of the ENIAC are connected into the synchronizing trunk so that they can pick up the pulses needed for their operation.

The pulses generated by the cycling unit or pulses from some external source can be viewed on the screen of an oscilloscope built into the cycling unit.This chapter will cover the following topics: sources of pulses and gates, Sec. 3.1; methods of operation of the cycling unit and ENIAC, Sec. 3.2; cycling unit oscilloscope, Sec 3.3.

Reference will be made to the following drawings:

		Front Panel of the Cycling Unit	PX-9-303
		Front View of the Cycling Unit	PX-9-304
		Block Diagram of the Cycling Unit
		     and Initiating Unit	PX-9-307
		Cycling Unit Pulses and Gates	PX-9-306


3.1.1. The Pulses and Gates

The nine different kinds of pulses and the gate emitted by the cycling unit every 200 microseconds are shown on PX-9-306. The lOP are classified as off beat pulses; all other pulses as on beat. Each of the lOP, 9P, 2P, 2'P, 4P, the 1P; 1'P and CPP are roughly the same in shape and alike in duration (namely, 2 microseconds). They differ from one another in the line of the synchronizing trunk over which they ar transmitted, the part of the addition time cycle in which they are emitted, and the purposes for which they are used in the ENIAC.

The 9P, the 1'P, the 1,2,2', and 4P are commonly used as digit pulses. An accumulator transmits the number stored in it or the complement of the number stored in it by gating appropriate numbers of the 9P over the various lines of the digit output. In the transmission of complements from an accumulator, the 1'P is gated and allowed to pass over the lead which carries the extreme right hand significant figure being stored in the accumulator to make a tens instead of nines complement. The 1,2,2', and 4 pulses are used particularly where information stored in static form is converted into pulse form, e.g. in the high speed multiplier, the function table, the divider-square-rooter, and the constant transmitter. By suitable combinations of the 1,2, 2' and 4 pulses any number between 1 and 9 can be formed. The lOP are used only if it starts from when the transmission of a number and/or its complement from an accumulator takes place (see Sec. 4.3.1).

The carry clear gate (which lasts from pulse time 11 to 17) is used to cause the clearing of accumulators which, at the operator's option, may or may not take place after transmission from an accumulator (see Sec. 4.2.3.). The carry clear gate also allows a carry over pulse to pass from a decade counter to the decade counter immediately to the left if carry over takes place in the reception of a number by an accumulator (see Sec. 4.3.2.). Carry over can take place in two ways: delayed or direct. In delayed carry over, the first reset pulse passed through a gate (which is controlled by a flip-flop that remembers that carry over is to take place) is gated by the carry clear gate so that it can reach the next decade. The second reset pulse resets this flip-flop. Direct carry over takes care of carry overs which result from carry over. In this latter form, the pulse which necessitates carry over (and not the reset pulse, as above) is the one which the carry clear gate allows to pass to the next decade counter. The reset pulse is emitted twice, once during the emission of the carry clear gate for delayed carry over and once after the carry clear gate to reset carry over flip-flops which may be set after delayed carry over takes place. The first reset pulse is also used to reset a flip-flop (the same one used for carry over in reception) which is set in the process of transmitting from an accumulator.

The principal uses of the central program pulse (emitted at pulse time 17) are the provision of the program pulses needed to stimulate program controls and the resetting of the receivers and transceivers in these program controls.

3.1.2 Sources of the Pulses and Gates

A block diagram of the circuits of the cycling unit which are involved in generating the pulses and gates emitted by this unit appears on the left hand half of PX-9-307.

The oscillator (61,63) emits 100 KC sine waves which the pulse standardizer (K, L26) converts into pulses spaced at 10 microseconds intervals.

In continuous operation (see Sec. 3.2.) each pulse from the oscillator and pulse standardizer circuit is delivered to the on beat circuit. A special pulse standardizer in this circuit (tubes 61 and 62 and the l microsecond delay line) produces rectangular pulses 2 microsecond broad. The on beat circuit has 3 out-puts. One of the outputs is brought to a terminal labelled on beat pulse output terminal (see PX-9-304). For every pulse received by the on beat circuit, a pulse in phase with the 9P is emitted from this terminal. These pulses are used in the test equipment of the ENIAC (see ENIAC MAINTENANCE MANUAL). Another output of the on beat circuit delivers pulses to gates associated with various stages of the cycling unit ring and the third output delivers pulses to the off beat circuit.

The off beat circuit routes these pulses through a 2.5 microsecond delay line. This delay line is taped at half its length, for the pulses which cycle the ring counter. The pulses delayed the full 2.5 us, called the off beat pulses, are delivered to gate L30 (see Fig. 3-1 for a chronological comparison of the on beat and off beat pulses and the pulses which cycle the ring).

The off beat pulses pass through L30 to produce the lOP as long as gate L30 is held open by the lOP flip-flop (L29) in the abnormal state. This flip-flop is flipped into the abnormal state when the ring counter is in stage zero and remains in this stage until reset by a signal from gate A30 (which is controlled by stage 10 of the ring). The lOP neon correlated with this flip-flop is shown on PX-9-304.Stage 1 of the ring controls gate K30. The on beat pulse passed through gate K30 gives rise to the lP and the first of the 9P. Stage 2 of the ring controls gate J30. The on beat pulse passed through gate J30 gives rise to the first of the 2P and the second of the 9P, etc. In this way, the 1,2,2', and 4P, and the l'P are generated in the chronological order shown on PX-9-306.

When the cycling unit ring reaches stage 11, gate B27 opens to pass an on beat pulse. This signal sets the carry clear gate flip-flop, E27 (see PX-9-304 for the associated neon). This flip-flop remains in the abnormal state for the next 7 pulse times, being reset by an on beat pulse gated through gate H27 which is controlled by stage 18 of the ring. The signal from the carry clear gate flip-flop in the abnormal state produces the CCG.

While the carry clear gate is on, an on beat pulse gated through gate C27 (which is controlled by stage 13) produces a reset pulse. The second reset pulse is produced when the ring is in stage 19.

A signal from stage 17 of the ring gates an on beat pulse through gate 27 to produce a CPP.

All of the cycling unit pulses and gates shown on PX-9-306 are passed through cycling unit transmitters (61-70, 21-30, or 3-12) for power amplification before transmission from the cycling unit.

It is expected that most of the time the ENIAC's oscillator circuit with its 100 kilocycle rate will be used in the cycling unit. If for any reason it is desired to operate the ENIAC at some other rate, a different oscillator can be plugged in and used to supply pulses to the on beat circuit. When the oscillator switch (see PX-9-304) is set at Ext. and an external oscillator is plugged into the external oscillator input terminal at the right of this switch, the fundamental pulses for the cycling unit are derived from the external oscillator. When the cycling unit's oscillator supplies the fundamental pulses, the oscillator switch is set at Int. It is to be noted that the time constants for the ENIAC's circuits have been designed for a frequency of 100 KC and certain safety factors have been included on this basis. If a higher frequency is used, these safety factors will be lost so that the reliability of the ENIAC will be decreased.


The cycling unit can be set up so that the ENIAC operates in one of 3 modes:

Continuous operation is the natural method of operation of the ENIAC. One addition time or one pulse time operation is used for testing and checking purposes. One addition time operation is particularly useful in checking a set-up that is put on the ENIAC. Before actually running through a complete computation continuously, the operator can cause the ENIAC to progress through one cycle of the computation addition time by addition time. By observing the neon bulbs in the various units, he can then check to see that the units are operating properly and that switch settings and cable connections have been made correctly to carry out the contemplated set-up. To test whether or not a particular unit is functioning properly, 1 addition time, or, for finer discrimination, one pulse time operation can be used.

The cycling unit controls which are used for the various modes of operation are the operation selector switch and the 1 pulse time-1 addition time push button (see PX-9-303). When the operation selector switch is set at Cont., the cycling unit emits the pulses and gates continuously. When this switch is set at 1 Add, the pulses and gates for 1 complete addition time cycle are given out every time the 1P-1A button is pushed. With the switch set at 1 Pulse, the pulses or gates of the addition time cycle are given out in chronological sequence, one each time the 1P-1A button is pushed. It might be mentioned that all three modes of operation are possible whether the ENIAC's oscillator or an external oscillator is used to supply the fundamental pulses.

Continuous or non-continuous operation is accomplished by allowing all pulses or only certain pulses from the oscillator circuit to reach the on beat circuit (and then the off beat circuit, and the ring with its associated gates). The continuous relay, the 1 addition time relay, gates L 28 and L 27 and the 1 pulse - 1 addition time push button (see PX-9-307) are used for this purpose. It might be pointed out that gate L 27 is connected to the normally positive output of stage zero of the ring. Thus L 27 is closed when the ring is in stage zero and open at all other times.

In continuous operation, the requirements are that the circuit containing gates L 27 and L 28 shall pass all of the pulses from the oscillator and that accidentally pushing the 1 pulse - 1 addition time push button shall have no effect. The requirements are met in the following way: with the operation switch set at continuous (as shown on PX-9-307), the continuous relay is activated so that contacts 1 and 3 are closed and the 1 addition time relay is not activated so that contact 6 is closed. Now with contact 1 closed, the cathode of tube 70 (at the left) floats and the tube is, therefore, inoperative. Since this tube is not conducting, a positive voltage is applied to gate L 28. The circuit through contact 3 delivers to the pulse standardizer K-L 26 and then to gate L 28 the oscillator pulses which then pass through gate L 28.

When the operation switch is set at 1P or 1A, respectively, only the pulse which results from pushing the 1 pulse - 1 addition push button or only 20 oscillator pulses immediately following the pushing off the button are to reach the on beat circuit. Let us, therefore, consider the circuit containing the 1 pulse - 1 addition push button. Tubes 68 are normally on and tubes 69 constitute a flip-flop with but one stable state (a non-standard flip-flop for the ENIAC). The normally positive output of this flip-flop is taken to tube 70 and the normally negative output is used to reset the flip-flop immediately after it is set. When the push button is pushed, tubes 68 go off and the flip-flop is set momentarily; otherwise this flip-flop remains in the normal state.

When the operation switch is set at l**P, neither the continuous nor the 1 addition time relay is activated so that contacts 6,4,and 2 are closed. The circuit through contact 2 connects the cathode of tube 70 (at the left) to -40V so that, with the flip-flop (69) in the normal state, tube 70 is on. The negative output of this tube holds L 28 closed. Only when the push button is pushed is tube 70 turned off so as to open gate L 28. The positive pulse from tube 70 (at the left) also passes through the other tube of the same number and, through contacts 6 and 4, is delivered to the pulse standardizer and, finally, gate L 28.

In 1 addition time operation, contacts 5,4,and 2 are closed. The circuit through contact 2, as described above, causes gate L 28 to be opened momentarily when the 1 pulse - 1 addition time button is pushed. The circuit through contacts 5 and 4 delivers the oscillator's pulses to the pulse standardizer and the gates L 27 and L 28. The first oscillator pulse passes through gate L 28. This pulse results, finally, in cycling the ring from stage zero to stage 1 so that the subsequent 19 pulses from the oscillator pass through gate L 27. When the ring reaches stage zero again, L 27 is closed and L 28 does not open again unless the 1 pulse - 1 addition button is pushed. In case the cycling unit has been running in the 1 pulse time mode and is switched into the one addition time mode in the midst of an addition time cycle, the pulses and gates for the remainder of the addition time are given out immediately (since gate L 27 is open), whether or not the 1 pulse - 1 addition button is pushed.

Controls are provided which enable the operator to control the method of operation of the cycling unit when he is standing near some unit different from the cycling unit. The PA, lA, and Cont. input terminals (shown on PX-9-303) make this possible. Portable push buttons may be used in connection with these terminals by plugging them into program lines (with no load box) which are in turn connected to each of the terminals PA, 1A, and Cont. A push button connected to terminal PA parallels the 1 pulse - 1 add addition time push button. Portable push buttons connected to the 1A or Cont. terminals can be used only when the operation selector switch is set at 1 Pulse, since, with either of the other settings, the mode of operation circuits are locked so that they cannot be entered except from the operation selector switch. Closing the button connected to terminal lA causes the 1 addition time relay to be activated; closing the button connected to the Cont. terminal causes the continuous relay to be activated.

A more convenient method of operating the 1 pulse time - 1 addition time push button and the operation selector switch from any place in the ENIAC room is provided by the portable control box. This box, which parallels certain controls found on both the initiating unit and the cycling unit, is discussed in Section 11.6.


An oscilloscope whose screen is shown on PX-9-303 is built into the cycling unit. The oscilloscope input switch with its 12 positions makes it possible to view any of the groups of cycling unit pulses or gates, the selective clear gate, or any external signal brought to the cycling unit through terminal Ext. below the switch.

It might be noted that the main purpose of the oscilloscope is to make possible verification of the presence of the pulses and to provide a rough check on their amplitudes. When viewed on the screen, the cycling unit pulses and gates should be approximately an inch high as indicated by the line on the oscilloscope screen. Because of their reflection in the lines of the synchronizing trunk, the cycling unit pulses and gates seen on the oscilloscope screen do not have the symmetrical square shown on the chart below the screen.