ENIAC                             World Wide Web



     BRLESC Ballistic Research Laboratories Electronic Scientific Computer
                               (U.S. Amry Photo)


Exterior ballistics problems such as high altitude, solar and lunar trajectories, computation for the preparation of firing tables and guidance control data for Ordnance weapons, including free flight and guided missiles.

Interior ballistic problems, including projectile, propellant and launcher behavior, e.g., physical characteristics of solid propellants, equilibrium composition and thermodynamic properties of rocket propellants, computation of detonation waves for reflected shock waves vibration of gun barrels and the flow of fluids in porous media.

Terminal ballistic problems, including nuclear, fragmentation and penetration effects in such areas as explosion kinetics, shaped charge behavior, ignition, and heat transfer.

Ballistic measurement problems, including photogrammetric, ionospheric, and damping of satellite spin calculations, reduction of satellite doppler tracking data, and computation of satellite orbital elements.

Weapon systems evaluation problems, inlcuding antiaircraft and anti- missile evaluation, war game problems, linear programming for solution of Army logistical problems, probabilities of mine detonations and lethal area and kill probabilities of mine detonations, and lethal area and kill probability studies of missiles.


Internal number system        Binary
Binary digits/word            68 + 4 parity
Binary digits/instruction     68
Instructions/word             1
Instructions decoded          33
Arithmetic system             Fixed and floating point
Instruction type              Three-address
Instruction word format
  4      4        6        14          6       14          6        14
Order  Para-    Index   (alpha)-Ad-  Index  (beta)-Ad-   Index  (gamma)-Ad-
type   meter             dress               dress               dress

Number word format                  Fixed Point
  3     1     4     .                   60
 Tag  Sign          Binary Point

Number word format                  Floating Point
  3     1     4     .                    52                 8
 Tag  Sign          Binary Point     Coefficient     Biased Exp of 16

Automatic built-in subroutines

In additon to the standard set of jump instructions, three more jump instructions have been included which will be used in connection with the "permanent" storage of "built-in" subroutines. These are Jump to "permanent" instruction, Jump to "built-in" subroutine, and Set index and jump to main memory.

Registers and B-boxes

The machine will have 63-one microsecond access index registers, addressable by the alpha, beta, and gamma addresses of the instruction words.

The parameter bits of the instruction word are used to indicate variations of the basic order type.

All three arithmetic registers are 68 bits. Tag bits enter these registers only on the logical instructions and the shift instruction if it is cyclic or is a Boolean shift. On arithmetic orders, the tag bits are saved in a separate three bit register and the three extra bits in the arithmetic registers are used for checking overflow. Thus the range of numbers in the arithmetic unit is -128 less than or equal to N less than 128.

Add and subtract are performed the same as for normalized arithmetic, except the result is never shifted left at the end of the operation.

Before multiply is done, the coefficient that has the largest absolute value is normalized. There is no left normalization after the operation. Thus the result has approximately the same number of significant digits as the operand that had the smaller number of significant digits. It does tend to retain an average of about two or more bits than it should, however.

Before divide is done, both operands are normalized but the number of divide steps performed is reduced accordingly so that the result has approximately the same number of significant digits as the operand that had the smaller number of significant digits.


     Operation                         Excl A T            Incl A T
Fixed point add or subtract                1                   5
Fixed or floating multiply                20                  25
Fixed or floating divide                  60                  65
Floating add or subtract                 3.0                   6
Boolean logic operation                    1                   5
Indexing and control                       2                   2(Avg)

Construction (Arithmetic unit only)

The arithmetic unit is constructed of standard vacuum tube logical packages, with tube driven, crystal diode logical gating. The arithmetic unit only is constructed of 1,727 vacuum tubes of 4 types, 853 transistors of 3 types, 46,500 diodes of 2 types and 1,600 pulse transformers of 1 type.

Arithmetic mode          Parallel
Timing                   Synchronous

Logical events are controlled by a five-phase clock, permitting decisions at a 5 Mc rate.

Operation                Concurrent

Indexing and control will be concurrent with arithmetic operations.

Except for arithmetic or Boolean compare instructions, the test overflow instructions with P_33 = 1, or any arithmetic order that stores in any index register or stores in the location of the next instruction, the machine always gets its next instruction from the memory while it is doing the previous instruction. If this next instruction is one of the control and indexing orders, it is immediately done, unless it is an input-output order or a test overflow order. If it is done, it proceeds to get another instruction and do it, if possible. Thus almost all of the control and indexing orders can be done concurrently with the arithmetic or logical orders. Only the arithmetic and logical orders require the use of the main arithmetic unit of the machine.

All types of input-output orders can be done concurrently with other instructions. Automatic interlocks are provided so as to prevent timing conflict. Reference to a main memory position within the range of either an input or output instruction will halt the computer until the input or output transfer has occurred at that memory position. The computer is released as soon as the transfer of that particular word has been made and does not wait for the entire transfer to be completed. There is no interlock on the index memory when it is used as index registers. Only the effective addresses alpha, beta, and gamma are conflict checked. The programmer can easily make the computer wait until such a transfer is complete by using the last address in the index range of the inout order in the A, B, or C addresses of a dummy order. An input-output instruction is not started until the previous arithmetic instruction is finished, hence the last arithmetic result may be included in the range of any input-output order.

As many as five input-output orders can be operating concurrently with computing and with each other. There is a separate trunk for reading cards, punching cards, using drum, and two separate trunks for using magnetic tape and all five of these trunks can operate concurrently.


                            No. of          Digits                Access
   Media                    Words           per Word              Microsec
Magnetic Core (Main)         4,096          72 binary                 2
Magnetic Core (Index)           63          16 binary                 1
Magnetic Drums (Two)        24,576
Magnetic Tapes (Six)
  No. of units that can be connected        16 Units
  No. of chars/linear inch                 400 Char/in
  Channels or tracks on the tape            16 Tracks/tape
  Blank tape separating each record       0.80 Inches
  Tape speed                               150 Inches/sec
  Transfer rate                        120,000 Char/sec
  Start time                               3.0 Millisec
  Stop time                                3.0 Millisec
  Average time for experienced
operator to change reel                     60 Seconds
  Physical properties of tape
    Width                                  1.0 Inch
    Length of reel                       2,500 Feet
    Composition                   0.43 Magnetic coating
                                  1.45 Mil

Provision is made for up to 16,384 words of high speed memory and system can be expanded to 28 tape stations.


   Media                     Speed
Card Reader              800 cards/min
Magnetic Tape            See "Storage"


   Media                     Speed
Card Punch               250 cards/min
Magnetic Tape            See "Storage"

Peripheral equipment

A single unit that is capable of converting alphanumerical characters from cards to tape, tape to high speed printer, tape to cards, cards to high speed printer and paper to magnetic tape.


Type                     Quantity

5847                        5,600
6197                          110
6C4                           110
6AQ5                          220
Misc                           80

LD70/CTP309                12,600
LD71                      100,000
Misc                       13,700

2N697                         600
2N1143                        240
2N398                       1,600
Misc                        6,300


Code checking features will include stopping on any selected address, the display of the contents of any memory cell, the display of normal or abnormal conditions, the ability to manually store in any selected memory cell, and the ability to transfer control to any part of the system. Parity checking is performed in each of the four 17-bit groups in each word.


Power, computing system    35 Kw
Power, air conditioner     20 Kw
Space, computing system    Plenum is 30 ft x 40 ft
Space, air conditioner     (see below)
Capacity, air conditioner  25 Tons

Chilled water is sent two flights up to computer site to heat exchanger, transferring heat from computer closed loop air to closed loop chilled water. On ground floor, compressor refrigerant absorbs heat from chilled water. An evaporative system absorbs heat from refrigerant in a cooling tower. Compressor located two floors below. Liquid coolant piped upstairs. Heat exchanger, computer closed-loop air-to-coolant at computer site, and coolant-to-outside air downstairs.


Number of systems produced to date      1
Operational date anticipated as 1 April 1961.


The approximate cost, including an additional bank of 4,096 words of high speed memory, 6 tape stations, the sytem as described, with all peripheral converters and input-output equipment, site preparation, overhead and other related costs will be approximately 2.0 million dollars.


                         Three 8-Hour Shifts
Supervisors                       6
Analysts                          3
Programmers and Coders           14
Clerks                            1
Engineers                         1
Technicians                       6

No engineers are assigned to the operation of the machine, but are used for development and design of additions to the machine. The technicians consult the engineers when a total break-down occurs.


A high degree of reliability is achieved by utilizing standard logical plug-in packages, a riggedized, long life, driver tube, derated components and point-to-point soldered connections.


     Computing Laboratory
     Ballistic Research Laboratories
     Aberdeen Proving Ground, MD

Up | Prev | Next